We are currently working on a methodology that aims to optimally trade off the time-to-train with regard to the desired degree of accuracy on these popular datasets. Thirdly, we’ve evaluated several network architectures, particularly wider residual models on larger computer vision datasets, and obtained record accuracies. Our main research proved to have a two-way objective: (1) making sure that multi-node scaling is performed as efficient as possible and (2) developing new learning rate schedules that converge to state-of-the-art accuracies for very large batch training on up to 1536 Intel® Xeon Phi™ nodes. The results were obtained on large-scale state-of-the-art systems such as TACC’s Stampede2 and BSC’s MareNostrum4.
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Some of the highlights of 2017 were less than 30 minute training time on the popular Imagenet-1K dataset, as well as state-of-the art results in terms of accuracy on other datasets such as the full ImageNet and Places-365 datasets. The original focus for 2017 was on minimizing the time-to-train of several deep convolutional neural networks on state-of-the-art computer vision datasets such as ImageNet and beyond. Since 2017 SURFsara became an Intel PCC, focusing on speeding up deep learning workloads on Intel-based supercomputers. SURFsara offers its HPC services to researchers from the Dutch academic sector, and is aware of the rapid development and impact of machine learning in HPC.
SURFsara is the national supercomputing center in the Netherlands, operating among other systems the Dutch national supercomputer. End 2016, he became the PI of the Intel Parallel Computing Center at SURFsara, focusing on optimizing deep learning techniques using Intel architecture, as well as extend their use to other application domains. In 2014, he joined SURFsara as HPC consultant, focusing on machine learning. Afterwards, he continued as a postdoctoral researcher at both Eindhoven and Groningen University, working on GPU computing, computer vision, and embedded systems in the scope of several EU-funded projects.
He followed-up with a PhD in Computer Architecture at the same institute. Valeriu studied Electrical Engineering and got his MSc at the Polytechnic University of Bucharest.
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